Special report on the best DRAMs for AI; RISC-V's growing influence; multi-die parasitic extraction; connecting AI accelerators; NPU population collapse; integrated verification; MBSE; AI PCs; interrupts.
Special report on chip reliability in harsh conditions; sub-7nm auto IC challenges; high-quality fab data streams; AI chip test problems; AI package ultrasonics; auto chip testing; ML for defect escapes.
AR/VR glasses; analog IC security; mobile SoC challenges; aerospace/defense security risks; how to talk to your dishwasher; modular cryptography; eIDAS; auto MACsec; multimodal AI MCUs; faster FuSa; AI-defined vehicles.
Optimizing data movement; verification tradeoffs; chiplets, 3D-ICs, and AI; more data, more redundant interconnects; AI shifts from tool agents to development flow agents; future-proofing AI models; optical interconnects; speeding up die-to-die interconnectivity; DAC's real value; stack die stress; RISC-V verification gap; CXL in AI; CSR management.
Cooling options; mask changes; advanced packaging materials; HDFO signal integrity; faster atomistic modeling; ion beam etching for LER; AI energy consumption.
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